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Added more registers
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BLM16 committed Nov 14, 2024
1 parent d50bebc commit 27e7134
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Showing 3 changed files with 232 additions and 11 deletions.
67 changes: 66 additions & 1 deletion crates/ads126x/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ mod register;

use error::ADS126xError;
use register::{
IdRegister, IdacMagRegister, IdacMuxRegister, InpMuxRegister, InterfaceRegister, Mode0Register, Mode1Register, Mode2Register, PowerRegister, RefMuxRegister, Register
GpioConRegister, GpioDatRegister, GpioDirRegister, IdRegister, IdacMagRegister, IdacMuxRegister, InpMuxRegister, InterfaceRegister, Mode0Register, Mode1Register, Mode2Register, PowerRegister, RefMuxRegister, Register, TdacnRegister, TdacpRegister
};

use embedded_hal::spi::FullDuplex;
Expand Down Expand Up @@ -290,4 +290,69 @@ where
pub fn set_refmux(&mut self, reg: &RefMuxRegister) -> Result<()> {
self.write_register(Register::REFMUX, reg.bits())
}

pub fn get_tdacp(&mut self) -> Result<TdacpRegister> {
let bits = self.read_register(Register::TDACP)?;
let data = TdacpRegister::from_bits(bits);
match data {
Some(reg) => Ok(reg),
None => Err(ADS126xError::InvalidInputData),
}
}

pub fn set_tdacp(&mut self, reg: &TdacpRegister) -> Result<()> {
self.write_register(Register::TDACP, reg.bits())
}

pub fn get_tdacn(&mut self) -> Result<TdacnRegister> {
let bits = self.read_register(Register::TDACN)?;
let data = TdacnRegister::from_bits(bits);
match data {
Some(reg) => Ok(reg),
None => Err(ADS126xError::InvalidInputData),
}
}

pub fn set_tdacn(&mut self, reg: &TdacnRegister) -> Result<()> {
self.write_register(Register::TDACN, reg.bits())
}

pub fn get_gpiocon(&mut self) -> Result<GpioConRegister> {
let bits = self.read_register(Register::GPIOCON)?;
let data = GpioConRegister::from_bits(bits);
match data {
Some(reg) => Ok(reg),
None => Err(ADS126xError::InvalidInputData),
}
}

pub fn set_gpiocon(&mut self, reg: &GpioConRegister) -> Result<()> {
self.write_register(Register::GPIOCON, reg.bits())
}

pub fn get_gpiodir(&mut self) -> Result<GpioDirRegister> {
let bits = self.read_register(Register::GPIODIR)?;
let data = GpioDirRegister::from_bits(bits);
match data {
Some(reg) => Ok(reg),
None => Err(ADS126xError::InvalidInputData),
}
}

pub fn set_gpiodir(&mut self, reg: &GpioDirRegister) -> Result<()> {
self.write_register(Register::GPIODIR, reg.bits())
}

pub fn get_gpiodat(&mut self) -> Result<GpioDatRegister> {
let bits = self.read_register(Register::GPIODAT)?;
let data = GpioDatRegister::from_bits(bits);
match data {
Some(reg) => Ok(reg),
None => Err(ADS126xError::InvalidInputData),
}
}

pub fn set_gpiodat(&mut self, reg: &GpioDatRegister) -> Result<()> {
self.write_register(Register::GPIODAT, reg.bits())
}
}
128 changes: 128 additions & 0 deletions crates/ads126x/src/register.rs
Original file line number Diff line number Diff line change
Expand Up @@ -463,3 +463,131 @@ impl RefMuxRegister {
self.insert(RefMuxRegister::from_bits_retain(bits << 3));
}
}

bitflags! {
pub struct TdacpRegister: u8 {
const OUTP = 0b1000_0000;

const _ = 0b1001_1111;
}
}

impl TdacpRegister {
pub fn get_magp(&self) -> TdacOutMag {
match self.bits() & 0b0001_1111 {
0b01001 => TdacOutMag::V4_5,
0b01000 => TdacOutMag::V3_5,
0b00111 => TdacOutMag::V3,
0b00110 => TdacOutMag::V2_75,
0b00101 => TdacOutMag::V2_625,
0b00100 => TdacOutMag::V2_5625,
0b00011 => TdacOutMag::V2_53125,
0b00010 => TdacOutMag::V2_515625,
0b00001 => TdacOutMag::V2_5078125,
0b00000 => TdacOutMag::V2_5,
0b10001 => TdacOutMag::V2_4921875,
0b10010 => TdacOutMag::V2_484375,
0b10011 => TdacOutMag::V2_46875,
0b10100 => TdacOutMag::V2_4375,
0b10101 => TdacOutMag::V2_375,
0b10110 => TdacOutMag::V2_25,
0b10111 => TdacOutMag::V2,
0b11000 => TdacOutMag::V1_5,
0b11001 => TdacOutMag::V0_5,

0b01010..=0b10000 | 0b11010..=0b11111 => panic!("Reserved MAGP"),
_ => unreachable!(),
}
}

pub fn set_magp(&mut self, magp: TdacOutMag) {
let bits = magp as u8;
self.insert(TdacpRegister::from_bits_retain(bits));
}
}

bitflags! {
pub struct TdacnRegister: u8 {
const OUTN = 0b1000_0000;

const _ = 0b1001_1111;
}
}

impl TdacnRegister {
pub fn get_magn(&self) -> TdacOutMag {
match self.bits() & 0b0001_1111 {
0b01001 => TdacOutMag::V4_5,
0b01000 => TdacOutMag::V3_5,
0b00111 => TdacOutMag::V3,
0b00110 => TdacOutMag::V2_75,
0b00101 => TdacOutMag::V2_625,
0b00100 => TdacOutMag::V2_5625,
0b00011 => TdacOutMag::V2_53125,
0b00010 => TdacOutMag::V2_515625,
0b00001 => TdacOutMag::V2_5078125,
0b00000 => TdacOutMag::V2_5,
0b10001 => TdacOutMag::V2_4921875,
0b10010 => TdacOutMag::V2_484375,
0b10011 => TdacOutMag::V2_46875,
0b10100 => TdacOutMag::V2_4375,
0b10101 => TdacOutMag::V2_375,
0b10110 => TdacOutMag::V2_25,
0b10111 => TdacOutMag::V2,
0b11000 => TdacOutMag::V1_5,
0b11001 => TdacOutMag::V0_5,

0b01010..=0b10000 | 0b11010..=0b11111 => panic!("Reserved MAGN"),
_ => unreachable!(),
}
}

pub fn set_magn(&mut self, magn: TdacOutMag) {
let bits = magn as u8;
self.insert(TdacnRegister::from_bits_retain(bits));
}
}

bitflags! {
pub struct GpioConRegister: u8 {
const CON0 = 0b0000_0001; // GPIO[0] -> AIN3
const CON1 = 0b0000_0010; // GPIO[1] -> AIN4
const CON2 = 0b0000_0100; // GPIO[2] -> AIN5
const CON3 = 0b0000_1000; // GPIO[3] -> AIN6
const CON4 = 0b0001_0000; // GPIO[4] -> AIN7
const CON5 = 0b0010_0000; // GPIO[5] -> AIN8
const CON6 = 0b0100_0000; // GPIO[6] -> AIN9
const CON7 = 0b1000_0000; // GPIO[7] -> AINCOM
}
}

bitflags! {
/// Setting `DIR<x>` to:
/// - 0 = `GPIO<x>` is output
/// - 1 = `GPIO<x>` is input
pub struct GpioDirRegister: u8 {
const DIR0 = 0b0000_0001;
const DIR1 = 0b0000_0010;
const DIR2 = 0b0000_0100;
const DIR3 = 0b0000_1000;
const DIR4 = 0b0001_0000;
const DIR5 = 0b0010_0000;
const DIR6 = 0b0100_0000;
const DIR7 = 0b1000_0000;
}
}

bitflags! {
/// If `GPIO<x>` is output, read returns 0b.
/// If `GPIO<x>` is input, write sets `GPIO<x>` to high (if 1) or low (if 0).
pub struct GpioDatRegister: u8 {
const DAT0 = 0b0000_0001;
const DAT1 = 0b0000_0010;
const DAT2 = 0b0000_0100;
const DAT3 = 0b0000_1000;
const DAT4 = 0b0001_0000;
const DAT5 = 0b0010_0000;
const DAT6 = 0b0100_0000;
const DAT7 = 0b1000_0000;
}
}
48 changes: 38 additions & 10 deletions crates/ads126x/src/register/enums.rs
Original file line number Diff line number Diff line change
Expand Up @@ -174,16 +174,16 @@ pub enum IdacOutMux {
/// I50uA = 50 microamps of current.
#[repr(u8)]
pub enum IdacCurMag {
I50uA = 0b0000,
I100uA = 0b0001,
I250uA = 0b0010,
I500uA = 0b0011,
I750uA = 0b0100,
I1000uA = 0b0101,
I1500uA = 0b0110,
I2000uA = 0b0111,
I2500uA = 0b1000,
I3000uA = 0b1001,
I50uA = 0b0000,
I100uA = 0b0001,
I250uA = 0b0010,
I500uA = 0b0011,
I750uA = 0b0100,
I1000uA = 0b0101,
I1500uA = 0b0110,
I2000uA = 0b0111,
I2500uA = 0b1000,
I3000uA = 0b1001,
}

#[repr(u8)]
Expand All @@ -203,3 +203,31 @@ pub enum RefPositiveInp {
ExtAIN4 = 0b011,
IntAnlgSup = 0b100,
}

/// Voltages are with respect to V_AVSS.
/// Output magnitudes follow the pattern `V<num>`.
/// - `num` is the output magnitude in volts where _ is a substitute for a decimal point.
///
/// V4_5 = 4.5 V.
#[repr(u8)]
pub enum TdacOutMag {
V4_5 = 0b01001,
V3_5 = 0b01000,
V3 = 0b00111,
V2_75 = 0b00110,
V2_625 = 0b00101,
V2_5625 = 0b00100,
V2_53125 = 0b00011,
V2_515625 = 0b00010,
V2_5078125 = 0b00001,
V2_5 = 0b00000,
V2_4921875 = 0b10001,
V2_484375 = 0b10010,
V2_46875 = 0b10011,
V2_4375 = 0b10100,
V2_375 = 0b10101,
V2_25 = 0b10110,
V2 = 0b10111,
V1_5 = 0b11000,
V0_5 = 0b11001,
}

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