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Moved status register to register module
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BLM16 committed Nov 9, 2024
1 parent 6437ec7 commit ea70a00
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Showing 2 changed files with 47 additions and 48 deletions.
48 changes: 0 additions & 48 deletions crates/ads126x/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,6 @@ mod register;
use error::ADS126xError;
use register::{Register, IdRegister, PowerRegister, InterfaceRegister};

use bitflags::bitflags;
use embedded_hal::spi::FullDuplex;
use heapless::Vec;

Expand All @@ -18,53 +17,6 @@ where
spi: SPI,
}

bitflags! {
pub struct StatusRegister: u8 {
const ADC2 = 0b1000_0000;
const ADC1 = 0b0100_0000;
const EXTCLK = 0b0010_0000;
const REF_ALM = 0b0001_0000;
const PGAL_ALM = 0b0000_1000;
const PGAH_ALM = 0b0000_0100;
const PGAD_ALM = 0b0000_0010;
const RESET = 0b0000_0001;
}
}

impl StatusRegister {
pub fn is_adc2_data_new(&self) -> bool {
self.contains(StatusRegister::ADC2)
}

pub fn is_adc1_data_new(&self) -> bool {
self.contains(StatusRegister::ADC1)
}

pub fn is_extclk(&self) -> bool {
self.contains(StatusRegister::EXTCLK)
}

pub fn is_ref_alm(&self) -> bool {
self.contains(StatusRegister::REF_ALM)
}

pub fn is_pgal_alm(&self) -> bool {
self.contains(StatusRegister::PGAL_ALM)
}

pub fn is_pgah_alm(&self) -> bool {
self.contains(StatusRegister::PGAH_ALM)
}

pub fn is_pgad_alm(&self) -> bool {
self.contains(StatusRegister::PGAD_ALM)
}

pub fn is_reset(&self) -> bool {
self.contains(StatusRegister::RESET)
}
}

pub enum ADCCommand {
NOP,
RESET,
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47 changes: 47 additions & 0 deletions crates/ads126x/src/register.rs
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,53 @@ pub enum Register {
ADC2FSC1 = 0x1A,
}

bitflags! {
pub struct StatusRegister: u8 {
const ADC2 = 0b1000_0000;
const ADC1 = 0b0100_0000;
const EXTCLK = 0b0010_0000;
const REF_ALM = 0b0001_0000;
const PGAL_ALM = 0b0000_1000;
const PGAH_ALM = 0b0000_0100;
const PGAD_ALM = 0b0000_0010;
const RESET = 0b0000_0001;
}
}

impl StatusRegister {
pub fn is_adc2_data_new(&self) -> bool {
self.contains(StatusRegister::ADC2)
}

pub fn is_adc1_data_new(&self) -> bool {
self.contains(StatusRegister::ADC1)
}

pub fn is_extclk(&self) -> bool {
self.contains(StatusRegister::EXTCLK)
}

pub fn is_ref_alm(&self) -> bool {
self.contains(StatusRegister::REF_ALM)
}

pub fn is_pgal_alm(&self) -> bool {
self.contains(StatusRegister::PGAL_ALM)
}

pub fn is_pgah_alm(&self) -> bool {
self.contains(StatusRegister::PGAH_ALM)
}

pub fn is_pgad_alm(&self) -> bool {
self.contains(StatusRegister::PGAD_ALM)
}

pub fn is_reset(&self) -> bool {
self.contains(StatusRegister::RESET)
}
}

bitflags! {
pub struct IdRegister: u8 {
const _ = !0; // Source may set any bits
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