loongarch: force to generate relocation pairs for data sections

This fixes rustc code generation for "reltable" entries, like:

    i32 trunc (
        i64 sub (
	    i64 ptrtoint (<{ [1 x i8] }>* @alloc47 to i64),
	    i64 ptrtoint ([5 x i32]* @reltable.func to i64)
	) to i32
    )

We need either an ADD32/SUB32 pair or a PUSH_PCREL/POP pair, so currently
we don't have any better solution for this.  RISC-V uses a single PCREL
reloc for this OTOH.
See loongson/LoongArch-Documentation#9.

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.cpp

@@ -70,10 +70,13 @@ static bool requiresFixups(MCContext &C, const MCExpr *Value,
                            MCConstantExpr::create(E.getConstant(), C), C);
   RHS = E.getSymB();
 
+  return true;
+/*
   return (A.isInSection() ? A.getSection().hasInstructions()
                           : !A.getName().empty()) ||
          (B.isInSection() ? B.getSection().hasInstructions()
                           : !B.getName().empty());
+*/
 }