x86_64: Implement integer saturating left shifting codegen

[xtexChooser]

Simliarly to shl_with_overflow, we first SHL/SAL the integer, then SHR/SAR it back to compare if overflow happens.
If overflow happened, set result to the upper limit to make it saturating.

Theoretically, if the left shifting instruction is lowered as a single SHL/SAL opcode, and the left operand fits into a register (so no truncation is needed), the CF flag can be used to check for overflow. However the optimization is not implemented right now (for my laziness).

Bug: #17645

[xtexChooser]

What's the CI error. It seems that I didn't touch that region of code.

[mlugg]

Don't mind that failure -- it's an inconsistent issue which is being debugged as I type this. Once it's fixed, a rebase should solve that error.

[jacobly0]

I don't like that this introduces a miscomp, I would rather the backend error on unsupported types rather than silently produce incorrect code.

[xtexChooser]

@jacobly0 which unsupported types? there is already a compiler error when unsupported type is hit.

https://github.com/ziglang/zig/blob/ec2df79cbf25e53c79d53dd6d461bd9d7457bd85/src/arch/x86_64/CodeGen.zig#L12944-L12946

[jacobly0]

$ cat check.zig
const std = @import("std");

fn shlSat(x: anytype, y: std.math.Log2Int(@TypeOf(x))) @TypeOf(x) {
    return x <<| y;
}

fn testType(comptime T: type) bool {
    var ok = true;
    comptime var rhs: std.math.Log2Int(T) = 0;
    inline while (true) : (rhs += 1) {
        comptime var lhs: T = std.math.minInt(T);
        inline while (true) : (lhs += 1) {
            ok = shlSat(lhs, rhs) == lhs <<| rhs and ok;
            if (lhs == std.math.maxInt(T)) break;
        }
        if (rhs == @bitSizeOf(T) - 1) break;
    }
    return ok;
}

pub fn main() void {
    var ok = true;
    ok = testType(i2) and ok;
    ok = testType(u2) and ok;
    ok = testType(i3) and ok;
    ok = testType(u3) and ok;
    ok = testType(i4) and ok;
    ok = testType(u4) and ok;
    std.debug.print("{s}\n", .{if (ok) "ok" else "bad"});
}
$ zig run -fllvm check.zig
ok
$ zig run -fno-llvm check.zig
bad

[xtexChooser]

@jacobly0 ahh! Sorry for my mistake and thanks for your careful review!

I forgot that negative values need the minimum value to saturate and it seems that the saturating_arithmetic.zig behavior test is not strong enough. The force-push above should solve the error and the check you have given is passing successfully.

However, x86 does not have a saturating shifting instruction so we have to emit up to two shifting and two conditional branches, totally ~10 MIR instructions, I doubt if the shl_sat grammar and IR is useful, as it seems to be a pretty rare case.

[jacobly0]

Looks good enough to get in the next release, if I don't manage to finish the rewrite before then.

[jacobly0]

The ZF is not reliable after genBinOpMir(.{ ._, .cmp }, ..), please use a condition that does not depend on it instead.

[xtexChooser]

I am going to use one more SHR to get the sign bit and pass it directly as condition. Thank you for the catch (:

It seems that airCmp is also using genBinOpMir with cmp and returning eflags conditions. is this intended?
https://github.com/ziglang/zig/blob/5cfcb015033864c769235726975ab9919c217ef9/src/arch/x86_64/CodeGen.zig#L20662-L20663

[jacobly0]

As you can see here, all conditions depending on ZF are not possible in that code path.

[xtexChooser]

eq and neq are also ZF conditions, am I understanding wrong? If they are okay to use, then the current code should be working (the gt has been replaced by sign bit == 1), or else the equal condition above this piece of code also needs to be replaced.

[jacobly0]

Indeed, airShlWithOverflow is also wrong.

[xtexChooser]

How about hacking genBinOpMir to emit JCC after each asmRegisterRegister?

[jacobly0]

If only it were that simple... I'm sure there exists a jcc that would work for each desired condition, but we don't know the desired condition there.

Either extract the contents of airCmp into a separate function, or fail if the int is > 64 bits.