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refactor(memory): change vmstate memory type #1627

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30 changes: 15 additions & 15 deletions miden/tests/integration/exec_iters.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ fn test_exec_iter() {
let traces = test.execute_iter();
let fmp = Felt::new(2u64.pow(30));
let next_fmp = fmp + ONE;
let mem = vec![(1_u64, slice_to_word(&[13, 14, 15, 16]))];
let mem = vec![(1_u32, slice_to_word(&[13, 14, 15, 16]))];
let mem_storew1_loc = Some(Location {
path: path.clone(),
start: 33.into(),
Expand Down Expand Up @@ -310,8 +310,8 @@ fn test_exec_iter() {
stack: [17, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0].to_elements(),
fmp: next_fmp,
memory: vec![
(1_u64, slice_to_word(&[13, 14, 15, 16])),
(2u64.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
(1_u32, slice_to_word(&[13, 14, 15, 16])),
(2u32.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
],
},
VmState {
Expand All @@ -331,8 +331,8 @@ fn test_exec_iter() {
stack: [12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0, 0].to_elements(),
fmp: next_fmp,
memory: vec![
(1_u64, slice_to_word(&[13, 14, 15, 16])),
(2u64.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
(1_u32, slice_to_word(&[13, 14, 15, 16])),
(2u32.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
],
},
VmState {
Expand All @@ -344,8 +344,8 @@ fn test_exec_iter() {
.to_elements(),
fmp: next_fmp,
memory: vec![
(1_u64, slice_to_word(&[13, 14, 15, 16])),
(2u64.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
(1_u32, slice_to_word(&[13, 14, 15, 16])),
(2u32.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
],
},
VmState {
Expand All @@ -356,8 +356,8 @@ fn test_exec_iter() {
stack: [12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0].to_elements(),
fmp,
memory: vec![
(1_u64, slice_to_word(&[13, 14, 15, 16])),
(2u64.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
(1_u32, slice_to_word(&[13, 14, 15, 16])),
(2u32.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
],
},
VmState {
Expand All @@ -368,8 +368,8 @@ fn test_exec_iter() {
stack: [12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0].to_elements(),
fmp,
memory: vec![
(1_u64, slice_to_word(&[13, 14, 15, 16])),
(2u64.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
(1_u32, slice_to_word(&[13, 14, 15, 16])),
(2u32.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
],
},
VmState {
Expand All @@ -380,8 +380,8 @@ fn test_exec_iter() {
stack: [12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0].to_elements(),
fmp,
memory: vec![
(1_u64, slice_to_word(&[13, 14, 15, 16])),
(2u64.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
(1_u32, slice_to_word(&[13, 14, 15, 16])),
(2u32.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
],
},
VmState {
Expand All @@ -392,8 +392,8 @@ fn test_exec_iter() {
stack: [12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0].to_elements(),
fmp,
memory: vec![
(1_u64, slice_to_word(&[13, 14, 15, 16])),
(2u64.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
(1_u32, slice_to_word(&[13, 14, 15, 16])),
(2u32.pow(30) + 1, slice_to_word(&[17, 0, 0, 0])),
],
},
];
Expand Down
2 changes: 1 addition & 1 deletion processor/src/chiplets/memory/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -119,7 +119,7 @@ impl Memory {
/// Returns the entire memory state for the specified execution context at the specified cycle.
/// The state is returned as a vector of (address, value) tuples, and includes addresses which
/// have been accessed at least once.
pub fn get_state_at(&self, ctx: ContextId, clk: RowIndex) -> Vec<(u64, Word)> {
pub fn get_state_at(&self, ctx: ContextId, clk: RowIndex) -> Vec<(u32, Word)> {
if clk == 0 {
return vec![];
}
Expand Down
8 changes: 4 additions & 4 deletions processor/src/chiplets/memory/segment.rs
Original file line number Diff line number Diff line change
Expand Up @@ -39,8 +39,8 @@ impl MemorySegmentTrace {
}

/// Returns the entire memory state at the beginning of the specified cycle.
pub fn get_state_at(&self, clk: RowIndex) -> Vec<(u64, Word)> {
let mut result: Vec<(u64, Word)> = Vec::new();
pub fn get_state_at(&self, clk: RowIndex) -> Vec<(u32, Word)> {
let mut result: Vec<(u32, Word)> = Vec::new();

if clk == 0 {
return result;
Expand All @@ -53,13 +53,13 @@ impl MemorySegmentTrace {

for (&addr, addr_trace) in self.0.iter() {
match addr_trace.binary_search_by(|access| access.clk().as_int().cmp(&search_clk)) {
Ok(i) => result.push((addr.into(), addr_trace[i].value())),
Ok(i) => result.push((addr, addr_trace[i].value())),
Err(i) => {
// Binary search finds the index of the data with the specified clock cycle.
// Decrement the index to get the trace from the previously accessed clock
// cycle to insert into the results.
if i > 0 {
result.push((addr.into(), addr_trace[i - 1].value()));
result.push((addr, addr_trace[i - 1].value()));
}
},
}
Expand Down
2 changes: 1 addition & 1 deletion processor/src/chiplets/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -363,7 +363,7 @@ impl Chiplets {
/// Returns the entire memory state for the specified execution context at the specified cycle.
/// The state is returned as a vector of (address, value) tuples, and includes addresses which
/// have been accessed at least once.
pub fn get_mem_state_at(&self, ctx: ContextId, clk: RowIndex) -> Vec<(u64, Word)> {
pub fn get_mem_state_at(&self, ctx: ContextId, clk: RowIndex) -> Vec<(u32, Word)> {
self.memory.get_state_at(ctx, clk)
}

Expand Down
4 changes: 2 additions & 2 deletions processor/src/debug.rs
Original file line number Diff line number Diff line change
Expand Up @@ -21,13 +21,13 @@ pub struct VmState {
pub asmop: Option<AsmOpInfo>,
pub fmp: Felt,
pub stack: Vec<Felt>,
pub memory: Vec<(u64, Word)>,
pub memory: Vec<(u32, Word)>,
}

impl fmt::Display for VmState {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
let stack: Vec<u64> = self.stack.iter().map(|x| x.as_int()).collect();
let memory: Vec<(u64, [u64; 4])> =
let memory: Vec<(u32, [u64; 4])> =
self.memory.iter().map(|x| (x.0, word_to_ints(&x.1))).collect();
write!(
f,
Expand Down
4 changes: 2 additions & 2 deletions processor/src/host/debug.rs
Original file line number Diff line number Diff line change
Expand Up @@ -81,12 +81,12 @@ impl Printer {

// print the main part of the memory (wihtout the last value)
for (addr, value) in mem.iter().take(mem.len() - 1) {
print_mem_address(*addr as u32, Some(*value), false, false, padding);
print_mem_address(*addr, Some(*value), false, false, padding);
}

// print the last memory value
if let Some((addr, value)) = mem.last() {
print_mem_address(*addr as u32, Some(*value), true, false, padding);
print_mem_address(*addr, Some(*value), true, false, padding);
}
}

Expand Down
2 changes: 1 addition & 1 deletion processor/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -687,7 +687,7 @@ impl ProcessState<'_> {
///
/// The state is returned as a vector of (address, value) tuples, and includes addresses which
/// have been accessed at least once.
pub fn get_mem_state(&self, ctx: ContextId) -> Vec<(u64, Word)> {
pub fn get_mem_state(&self, ctx: ContextId) -> Vec<(u32, Word)> {
self.chiplets.get_mem_state_at(ctx, self.system.clk())
}
}
Expand Down
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