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[RTGTest] Improved register representation #8052

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@maerhart maerhart commented Jan 9, 2025

  • Allows fixed registers to be pure and constant-like (thus they can CSE, etc.)
  • Ops representing fixed registers now fold to an attribute that is of the register type instead of i32 which makes handling in the elaboration pass easier.
  • Storing the allowed regs with the op allows the frontend to exclude registers if desired
  • If storing a list of attribute pointers with each virtual reg op becomes a performance problem we can change it to allow an empty list to mean any register of the dialect defining the register type is allowed (which the dialect tells us via a dialect interface). We could also use that dialect interface to store the allowed regs as a bitvector with the op then, essentially making it the same as now from a performance perspective (modulo an interface lookup).

Bit unfortunate that CAPI and Python bindings are not autogenerated for types and attributes as they are for ops.

@maerhart maerhart added the RTG Involving the `rtg` dialect label Jan 9, 2025
@maerhart maerhart requested a review from darthscsi January 9, 2025 20:58
@maerhart maerhart force-pushed the maerhart-rtgtest-improved-registers branch from 8f01c9f to 82ecbdc Compare January 9, 2025 21:26
@maerhart maerhart force-pushed the maerhart-rtgtest-improved-registers branch from 82ecbdc to 2f52c10 Compare January 9, 2025 21:35
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