Ibex bumped to CHERIoT ISA v1

dv/verilator/sonata_verilator_lint.vlt

@@ -42,6 +42,10 @@ lint_off -rule UNOPTFLAT -file "*ibex_load_store_unit.sv" -match "*Signal unopti
 lint_off -rule UNOPTFLAT -file "*ibex_load_store_unit.sv" -match "*Signal unoptimizable: Circular combinational logic: '*.cpu_req_valid'"
 lint_off -rule UNOPTFLAT -file "*cheri_tbre_wrapper.sv" -match "*Signal unoptimizable: Circular combinational logic: '*.mstr_arbit_comb'"
 
+// Many width issues have been introduced upstream. These should be fixed there but are relatively harmless.
+lint_off -rule WIDTHEXPAND -file "*/rtl/cheri_pkg.sv"
+lint_off -rule WIDTHTRUNC -file "*/rtl/cheri_pkg.sv"
+
 // Lint error for PULP debug module.
 lint_off -rule UNUSED -file "*pulp_riscv_dbg*" -match "*not used*"
 lint_off -rule IMPERFECTSCH -file "*pulp_riscv_dbg*"
@@ -86,6 +90,9 @@ lint_off -rule UNOPTFLAT -file "*/rtl/prim_fifo_async_simple.sv"
 lint_off -rule UNOPTFLAT -file "*/rtl/prim_subreg_ext.sv"
 lint_off -rule BLKSEQ -file "*/rtl/ibex_tracer.sv"
 
+// Build warns of circular logic, but this is functioning correctly so it is safe to ignore.
+lint_off -rule UNOPTFLAT -file "*/rtl/ibexc_top_tracing.sv" -match "*rvfi_rd_addr*"
+
 // Bug seem in Verilator v5.020 where trace chandles produces a C++ compilation
 // error (generated C++ doesn't currently specify a type an internal verilator
 // function)

vendor/lowrisc_ibex.lock.hjson

@@ -9,6 +9,6 @@
   upstream:
   {
     url: https://github.com/lowrisc/cheriot-ibex.git
-    rev: adc4803d5d13cdf5a629b3f53fb4ce8d1ac38fe5
+    rev: 515481d29a4b927548498bd314a704340adb1ca3
   }
 }

vendor/lowrisc_ibex/.github/workflows/pr_trigger.yml

@@ -19,7 +19,7 @@ jobs:
       # so we just save the file needed to do the review
       # in a context with proper access rights
       - name: Upload event file as artifact
-        uses: actions/upload-artifact@v2
+        uses: actions/upload-artifact@v4
         with:
           name: event.json
           path: event.json