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RP1 DPI: Add interlaced modes #6529
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BITS(DPI_DMA_FRONT_PORCH_COLSM1, mode->hsync_start - mode->hdisplay - 1)); | ||
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vctrl = BITS(DPI_DMA_CONTROL_VSYNC_POL, !!(mode->flags & DRM_MODE_FLAG_NVSYNC)) | | ||
BITS(DPI_DMA_CONTROL_VBP_EN, (mode->vtotal != mode->vsync_start)) | |
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Remove the excess white space. Normal coding style wouldn't align this type, only in tables.
* based on HSYNC, DE (which *must* both be mapped to GPIOs 1, 3 respectively). | ||
* This driver includes a PIO program to do that, when DE is enabled. | ||
* | ||
* An alternative fixup is to synthesize CSYNC from HSYNC and modified-VSYNC. |
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Have you still got CSYNC support? I thought you'd said it had been dropped.
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DPI VSYNC waveform is somewhat arbitrary (since it can't be correct for interlace). Here it's designed to assist CSYNC generation. But I removed the PIO code that actually does generate CSYNC (for code bloat reduction).
{ | ||
static const int wrap_target = 14; | ||
static const int wrap = 26; | ||
u16 instructions[] = { /* This is mutable */ |
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Using statics means we can't instantiate the driver twice. Unlikely ever to happen, but I'd be tempted to put it in struct rpi1_dpi instead.
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These are just named constants. The PIO compiler spits out lower-case #define
s but I avoided those because they seemed unsightly, and there were formerly 3 different functions that defined similar-named constants differently.
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I'd misread instructions
as being static.
I assume the program gets copied into RP1 / PIO in some shape or form, so this doesn't need to remain in context after the pio_add_program
call.
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Ah, it's the other way around: instructions[] is mutable because it gets subjected to some runtime fixups (rather than have 4 or 8 different versions for different sync polarities). But I can change the style if it's unclear.
I assumed (perhaps wrongly) that using a run-time initializer is no less efficient than explicitly making a copy. And yes, it's not needed once it's been loaded into PIO instruction memory.
BTW I've just noticed that the BITS macro is a roll-it-yourself shift. |
I'll see if I can use those... |
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OK I just need to check it still works with the external/example program, and may adjust the offset of the "VSync helper" signal (which should make no difference to the built-in H/VSync case, that doesn't use it). Would be nice to keep the door open for equalizing pulses, but as the generally-accepted "PAL" modeline has 576 complete lines, and I don't want to make a special case for it, it seems slightly doomed: obviously we can't put an equalizing pulse in the middle of an active scanline. |
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When initialized from panel_bridge_attach(), connector should allow interlaced modes rather than invariably rejecting them, so that other components can validate them. Signed-off-by: Nick Hollinghurst <[email protected]>
Almost no DPI hardware supports it, but it's useful for RP1 video out. Signed-off-by: Nick Hollinghurst <[email protected]>
Implement interlaced modes by wobbling the base pointer and VFP width for every field. This results in correct pixels but incorrect VSYNC. Now use PIO to generate a fixed-up VSYNC by sampling DE and HSYNC. This requires DPI's DE output to be mapped to GPIO1, which we check. When DE is not exposed, the internal fixup is disabled. VSYNC/GPIO2 becomes a modified signal, designed to help an external device or PIO program synthesize CSYNC or VSYNC. Signed-off-by: Nick Hollinghurst <[email protected]>
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This PR breaks our auto-compilation:
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drivers/gpu/drm/rp1/rp1-dpi/Kconfig needs a CONFIG_RP1_PIO is in our standard bcm2712_defconfig, so does that mean you're using your own? |
Odd - our autobuilds are happy, as are my own builds. Are you using a different defconfig? I notice that CONFIG_DRM_RP1_DPI is lacking a dependency on CONFIG_RP1_PIO, which could explain the build failure. However, CONFIG_PWM_PIO_RP1 is also lacking that dependency, and your build of pwm-pio-rp1 isn't failing. |
I'll fix it. I'll make it an ifdef rather than a dependency as DPI should still be usable without it (apart from the interlaced sync fixup). |
I would add a |
I'd agree. |
Yes. Still this should not break this way. I will update our configs. Thanks for the tip. |
Be careful not to introduce a recursive dependency, as I seem to have just done. |
Yeah, I just did ;)
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That's a harsh test - it's objecting to "A selects B, B selects C, and A depends on C". |
I've unbroken the builds while we come up with a better scheme. |
kernel: RP1 DPI: Add interlaced modes See: raspberrypi/linux#6529 kernel: ASoC: allo-piano-dac-plus: Fix volume limit locking See: raspberrypi/linux#6532 kernel: drm: vc4: txp: Do not allow 24bpp formats when transposing See: raspberrypi/linux#6533 kernel: ASoC: allo-piano-dac-plus: Suppress -517 errors See: raspberrypi/linux#6534 kernel: drm: rp1: rp1-dpi: Fix optional dependency on RP1_PIO See: raspberrypi/linux#6535 kernel: serial: sc16is7xx: announce support for SER_RS485_RTS_ON_SEND See: raspberrypi/linux#6540
kernel: RP1 DPI: Add interlaced modes See: raspberrypi/linux#6529 kernel: ASoC: allo-piano-dac-plus: Fix volume limit locking See: raspberrypi/linux#6532 kernel: drm: vc4: txp: Do not allow 24bpp formats when transposing See: raspberrypi/linux#6533 kernel: ASoC: allo-piano-dac-plus: Suppress -517 errors See: raspberrypi/linux#6534 kernel: drm: rp1: rp1-dpi: Fix optional dependency on RP1_PIO See: raspberrypi/linux#6535 kernel: serial: sc16is7xx: announce support for SER_RS485_RTS_ON_SEND See: raspberrypi/linux#6540
Add support for interlaced DPI modes on Raspberry Pi 5. (Draft for testing, based on rpi-6.6.y)
In order for this to work correctly, DPI's DE output must be enabled on GPIO1 (whether used or not). PIO can then snoop on DE and HSYNC signals to generate a fixed-up VSYNC on GPIO2.
This is the cut-down version of the patch which omits CSYNC support, but it should still be possible to implement CSYNC (and equalizing pulses) using an external PIO program; I will need to update the example in utils/piolib/examples.