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Welcome to the Asterisk wiki a place with in depth explanations of the architecture!
Currently we are still in the idea/design stage in the lifecycle of Asterisk, so a lot of content here will change and evolve over time, this wiki is still a big work in progress.
Asterisk is [currently] a small hobbyist 32 bit CPU based on an in house RISC ISA (CommaISA), the instructions set definitions will be in the ISA page. It is designed primarily to be used by small projects with embedded applications, however since it open source, anyone can fork and use Asterisk as a starting point for their own projects. It will be implemented in VHDL, using the Xilinx ISE design suite. It is eventually going to be transitioned to a bit more powerful and performant Embedded CPU. the RISC-V 32 and 64 ISA, it will be a performance class CPU by the RISC-V stage. Asterisk is being maintained by a small group of students and teachers from The Roman Ridge School's Advanced Robotics Team, see About Us for more information.
Asterisk is licensed under the Apache 2.0 license, and thus anyone can contribute and make it better!
The docs can also be modified, please create a new issue with the documentation label.